Liquid crystal display devices have features of being thin and consuming low power and thus are in wide use in various fields. Especially, active matrix liquid crystal display devices have high contrast and superb response characteristics and provide high performance, and therefore are used for TVs, monitors and notebook computers. The size of the market of the active matrix liquid crystal display devices has been expanding recently.
An active matrix liquid crystal display device generally includes an active matrix substrate including a thin film transistor (TFT) that acts as a switching element and is provided for each of pixels (the active matrix substrate is also referred to as a “TFT substrate), a counter substrate including a color filter and the like (the counter substrate is also referred to as a “color filter substrate”), and a liquid crystal layer provided between the active matrix substrate and the counter substrate. The liquid crystal layer is supplied with an electric field in accordance with the potential difference between a pixel electrode electrically connected to the TFT and a common electrode, and an alignment state of liquid crystal molecules in the liquid crystal layer is changed by the electric field. Light transmittance of each pixel is controlled utilizing the change in the alignment state, so that display is provided.
Recently, higher definition liquid crystal display devices having a higher resolution have been developed. A high definition liquid crystal display device has difficulty providing a high numerical aperture of a panel. A reason for this is when the resolution is higher, areas that do not contribute to display (i.e., areas that lower the numerical aperture) such as lines, TFTs, light-shielded areas in the vicinity of contact holes and the like are enlarged.
In a liquid crystal display device, each pixel is provided with a storage capacitor that is electrically connected parallel to a liquid crystal capacitance. Generally in a TN (Twisted Nematic) mode or VA (Vertical Alignment) mode liquid crystal display device, at least one of a pair of electrodes that form the storage capacitor is formed of a light blocking material. Electrodes that form the storage capacitor are, for example, extended from a storage capacitor line (or, are a part of the storage capacitor line) or extended from a drain electrode of the TFT. Therefore, in the TN mode or VA mode liquid crystal display device, the storage capacitor also lowers the numerical aperture.
By contrast, there are some display modes in which the storage capacitor does not lower the numerical aperture. For example, a liquid crystal display device of an FFS (Fringe Field Switching) mode, which is a type of lateral electric field mode, has the following structure as disclosed in Patent Document 1. A common electrode is provided on an interlayer insulating layer that covers the TFTs, and pixel electrodes each having a plurality of slits are provided on a dielectric layer that covers the common electrode. The common electrode and the pixel electrodes are both formed of a transparent conductive material. A storage capacitor is formed of the common electrode, a pixel electrode overlapping the common electrode via the dielectric layer, and the dielectric layer provided between the common electrode and the pixel electrode. Therefore, in the FFS mode, the storage capacitor does not lower the numerical aperture. Patent Document 2 discloses a known structure of the FFS mode in which pixel electrodes are provided on an interlayer insulating layer that covers the TFTs, and a common electrode having a plurality of slits is provided on a dielectric layer that covers the pixel electrodes. In this structure also, the storage capacitor does not lower the numerical aperture.
For other display modes, as disclosed in Patent Documents 3 and 4, it is conceivable to provide a transparent storage capacitor electrode in the active matrix substrate so that a transparent storage capacitor is formed of the transparent storage capacitor electrode, a pixel electrode and a dielectric layer (interlayer insulating layer) provided between the transparent storage capacitor electrode and the pixel electrode.